Parallelizing the Mur' Veriier

With the use of state and memory reduction techniques in veri cation by explicit state enumeration, runtime becomes a major limiting factor. We describe a parallel version of the explicit state enumeration veri er Mur' for distributed memory multiprocessors and networks of workstations that is based on the message passing paradigm. In experiments with three complex cache coherence protocols, parallel Mur' shows close to linear speedups, which are largely insensitive to communication latency and bandwidth. There is some slowdown with increasing communication overhead, for which a simple yet relatively accurate approximation formula is given. Techniques to reduce overhead and required bandwidth and to allow heterogeneity and dynamically changing load in the parallel machine are discussed, which we expect will allow good speedups when using conventional networks of workstations.